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Fpga development engineer (h/f) - computadoras, redes e ingeniería, sa (madrid)

Madrid
Airbus
Publicada el 25 noviembre
Descripción

Job Description
A position of FPGA Development Engineer is now open in Airbus CRISA (Airbus Defense & Space) in Tres Cantos (Madrid area) for different Space business: Launchers, Earth Exploration (Copernicus), Space Exploration (Artemis), Commercial (Telecommunications Satellites).
This is an opportunity to join a diverse and dynamic Technical Team focused on: shape the future based on innovation of our products, new technologies and way of working, State of the art product consolidation, Continuous Performance improvement.
Definitely we are moved by our passion to make it fly!
In accordance with the proven candidate skills, she/he will be part of Digital team and will report/be supported by the relevant Skill Manager.
Responsibilities
The candidate is also part of the Project, with the main mission of developing/designing electronic units for flight equipment to achieve the unit delivery in accordance with project schedule, cost and quality requirements.
In a day-to-day basis, she/he will report to Project Manager.
Within each project, the tasks are coordinated by a Technical Responsible in charge of direct reporting to the Project Manager.
The engineer's tasks comprise the complete development of an electronic equipment: from the analysis of the requirements to the final delivery of the flight model once accepted.
You will be part of a high performance and highly experienced and motivated engineering team that works in the development of FPGA designs for space applications.
With the help of your mentor and your team, you will be responsible to define, implement and verify designs implemented in RTL VHDL in any of our working fields: Launchers (Ariane 6, Vega), Power management subsystems, Attitude control subsystems, Satellite electric propulsion, Image sensors management, data acquisition and processing, Instrument control units, On board computing, Antenna electronics, Communications.
You will be in charge of the analysis and synthesis of the high level requirements, the generation of the FPGA specification and design architecture.
The design implementation in RTL VHDL and its functional verification, the physical implementation (synthesis and layout) and its verification, the design documentation, and the communications with the customer in relation to the FPGA design.
Recommended Skills
High degree in engineering, and high background in Microelectronics.
At least 3 years of experience in FPGA designs.
Very good knowledge in VHDL.
Verilog, System Verilog is a plus.
Very good understanding of physical and timing constraints in synthesis and layout.
Very good understanding of Static Timing Analysis.
Knowledge of FPGA System on Chip.
Knowledge in high level synthesis.
Scripting languages Python, TCL, Bash.
Programming languages C/C++ is a plus.
FPGA design tools from Synopsys, Mentor, Actel/Microchip, Xilinx.
Emerging processor technology RISC-V.
Knowledge of HW prototyping solutions.
Additional Information
Feel like you can't tick some boxes above?
If you have most of the skills and experience that we're looking for and are willing to use your talent to learn the rest, we encourage you to apply!
This job requires an awareness of any potential compliance risks and a commitment to act with integrity, as the foundation for the company's success, reputation and sustainable growth.
EEO Statement
Airbus is committed to achieving workforce diversity and creating an inclusive working environment.
We welcome all applications irrespective of social and cultural background, age, gender, disability, sexual orientation or religious belief.
Airbus is, and always has been, committed to equal opportunities for all.
As such, we will never ask for any type of monetary exchange in the frame of a recruitment process.
Any impersonation of Airbus to do so should be reported to ******.
At Airbus, we support you to work, connect and collaborate more easily and flexibly.
Wherever possible, we foster adaptable working arrangements to stimulate innovative thinking.
Company
Computadoras, Redes e Ingeniería, SA
Contract Type
Permanent
Experience Level
Professional
Seniority Level
Director
Job Family
Elec.Electron.
&Electromag;,Optics&Optron.;
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