Job TitleSenior Mixed-Signal IC Design EngineerLocationMadrid, Spain (Tres Cantos) – with flexibility for remote working depending on profileCompany OverviewA cutting-edge semiconductor and technology company focused on the design and development of advanced mixed-signal and high-performance IC solutions.The organisation operates at the forefront of innovation, developing complex integrated systems combining analog, digital, and optoelectronic technologies within deep submicron CMOS nodes. The team is highly collaborative, research-driven, and focused on delivering next-generation products for demanding applications.Role OverviewThe company is looking for a Senior Mixed-Signal IC Design Engineer to contribute to the specification, design, and validation of advanced analog and mixed-signal blocks within complex SoCs.This role involves full ownership across the AMS design flow, working closely with system, layout, and test teams, while contributing to product innovation and future architecture development.Key ResponsibilitiesDefine specifications for analog and mixed-signal blocks (ADC, DAC, PLLs, interfaces, optoelectronic modules)Design and verify AMS circuits in deep submicron CMOS (65nm / 28nm and below)Own full design flow: system-level modelling, schematic design, layout supervision, and post-layout verificationProvide layout guidelines and review physical implementationCollaborate with test engineers on silicon validation, characterization, and correlation with simulationsSupport system-level modelling and integration into complex mixed-signal SoCsContribute to mixed-signal verification alongside digital teamsResearch new architectures and contribute to IP / patent generationPresent technical work and contribute to internal knowledge sharingRequirementsMSc or PhD in Electronics, Electrical Engineering, or related field~5+ years' experience in Analog / Mixed-Signal IC designProven experience delivering designs into silicon (definition → validation → production)Strong experience with Cadence / Synopsys design toolsHands-on experience designing in sub-nanometer CMOS nodes (≤65nm)Solid understanding of full-custom analog layout and ability to review layout workStrong communication skills and ability to work in cross-functional teamsFluent in EnglishNice to HaveExperience with complex mixed-signal SoC integrationExposure to optoelectronics or interface designExperience with behavioural modellingBackground contributing to innovative architectures or patent developmentExperience mentoring or guiding junior engineersSalary & PackageCompetitive and aligned with experience within an innovative semiconductor environment