Organisation/Company: UNIVERSIDAD POLITECNICA DE MADRID
Department: HRS4R
Research Field: Engineering » Electronic engineering
Researcher Profile: First Stage Researcher (R1)
Positions: Bachelor Positions
Country: Spain
Application Deadline: 17 Jun 2025 - 20:00 (Europe/Madrid)
Type of Contract: Temporary
Job Status: Full-time
Hours Per Week: 37.5
Offer Starting Date: 1 Jul 2025
Is the job funded through the EU Research Framework Programme? No
Is the Job related to staff position within a Research Infrastructure? No
Offer Description
* Design of mixed-signal and RF circuits.
* Validation, verification, and testing of mixed-signal and RF circuits.
* Heterointegration.
Where to apply
E-mail: catedra.chip@upm.es
Requirements
* Research Field: Engineering » Electronic engineering
* Education Level: Bachelor Degree or equivalent
Skills/Qualifications
* Degree in Electronic Engineering, Telecommunications, or a related field.
Specific Requirements
* Background in the design of mixed-signal circuits.
* Knowledge of commercial design tools like Cadence / Synopsys.
* Competence in computer architectures and digital system design with HDLs (Verilog or VHDL).
* Knowledge of heterogeneous integration or chiplet design.
Languages
* English: Excellent
* Spanish: Excellent
Additional Information
The contract includes a gross salary of €25,960 over 12 payments, with full social benefits in Spain. The salary is competitive for Madrid. Conference, summer school, and workshop registration fees will also be covered.
The researcher will participate in a joint program with INDRA, within the project “Chair UPM-INDRA in microelectronics”.
Eligibility criteria
* Academic records at bachelor's level.
* Previous experience in electronic circuit design.
* Compliance with specific requirements.
Work Location(s)
Number of offers: 2
Institute: ETSI Telecomunicación - Information Processing and Telecommunication Center
Country: Spain
City: Madrid
Postal Code: 28040
Street: Avenida Complutense 30
#J-18808-Ljbffr