Barcelona Supercomputing Center is seeking a Research Engineer specializing in cache hierarchy and interconnects to enhance RISC-V based HPC processors. The role involves feature implementation, performance analysis, and bottleneck resolution. Adecuado candidates should have a BS or MS in relevant fields and expertise in computer architecture and programming. This full-time position offers extensive training, flexible hours, private health insurance, and relocation support, with holidays totaling 28 days per year.
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