AUTSORSA is a fast-growing company founded and based in Bulgaria that serves clients from all over the world, providing business outsourcing, outstaffing and HR services.
Our client is a leading European semiconductor company developing cutting-edge AI chip infrastructure. They are at the forefront of memory subsystem design and high-performance computing, creating innovative solutions that power the next generation of AI processors.
We are looking for a Physical Implementation Engineer to join a highly skilled team developing next-generation AI hardware.
Description:
Are you passionate about physical chip design and working through complex challenges? We need you. In this role, you will take full ownership of the implementation process at the top level of an enormous design—from RTL to GDSII—utilizing some of the industry's most advanced technology nodes. ! As a Physical Implementation Engineer, you will take ownership of the physical implementation process, from physical chip design to chip production and post-silicon validation. You will work with cutting-edge technology, collaborating closely with external IP providers, EDA vendors, and silicon/package vendors to deliver high-performance SoCs or SiPs for mass production.
Key Responsibilities:
* Top Level/Full Chip implementation engineer.
* Experience of top level design planning, partitioning, and clock tree planning with many blocks including multiply instantiated modules ( MiM's)
* Experience with mixed top down design/bottom up design planning flows.
* Understanding and ability to implement various clock tree strategies ( basic, Htree, Mesh, Multisource CTS)
* Significant knowledge of and ability to contribute to top level STA and Physical verification as required.
* In conjunction with the STA lead engineer able to coordinate and drive block level timing and verification fixes required at block levels.
Requirements:
* Master's or PhD degree in Computer Science, Microelectronics, or Physics.
* Proven experience with multiple ( > 2) tapeouts of high-performance SoCs or SiPs.
* Expert user of Synopsys tool suite ( Fusion Compiler &/or ICC2 + Primetime ) tools.
* Experience with Physical Verification tools ( ICV/Calibre)
* Advanced scripting skills in Tcl/Perl/Python for tool control and manipulation nand data extraction.
* Experienced in using revision control systems, preferably GIT.
Additional:
* Able to guide and mentor junior engineers.
* Preferable acted as Physical Design lead for at least 2 hierarchical designs in advanced nodes
Why join us:
* Relocation package for you and your family (visa, flight, first month rent, housing assistance).
* Permanent, full-time onsite role in Barcelona, Spain.
* Flexible working hours (9–6, Monday to Friday).
* Work in one of the very few companies in Europe building AI chip infrastructure.
* Small, highly skilled team (147 people) with opportunities for learning and growth.
* Supportive, family-friendly environment with strong relocation assistance.
* Candies, coffee, and free Spanish lessons included!
How to Apply
If you are passionate about SoC architecture, integration, and AI hardware — and want to be part of a team shaping the future of AI-powered computing — we would love to hear from you!
Join us in building the next generation of AI processing solutions!
By applying to this advertisement, you voluntarily provide your personal data and consent to their processing for the purposes of recruitment. The processing of your personal data is carried out in full compliance with the requirements of Regulation (EU) 2016/679 (General Data Protection Regulation), the Personal Data Protection Act, and all other applicable regulations.
License for the selection of personnel from the Employment Agency No. 3484 of 08.03.2023 and No. 3485 of 08.03.2023 for the EU.