**Job Reference**:
- 514_25_CS_HPES_RE1
**Position**:
- Research Engineer - Computer Architecture Designs to address Average and Predictable Performance Bottlenecks (RE1)
**Closing Date**:
- Tuesday, 19 August, 2025
**Reference**: 514_25_CS_HPES_RE1
**Job title**: Research Engineer - Computer Architecture Designs to address Average and Predictable Performance Bottlenecks (RE1)
**About BSC**
- The Barcelona Supercomputing Center - Centro Nacional de Supercomputación (BSC-CNS) is the leading supercomputing center in Spain. It houses MareNostrum, one of the most powerful supercomputers in Europe, was a founding and hosting member of the former European HPC infrastructure PRACE (Partnership for Advanced Computing in Europe), and is now hosting entity for EuroHPC JU, the Joint Undertaking that leads large-scale investments and HPC provision in Europe. The mission of BSC is to research, develop and manage information technologies in order to facilitate scientific progress. BSC combines HPC service provision and R&D; into both computer and computational science (life, earth and engineering sciences) under one roof, and currently has over 1000 staff from 60 countries.
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**Context And Mission**
- The Barcelona Supercomputing Center - Centro Nacional de Supercomputación (BSC-CNS) is the leading supercomputing center in Spain. It houses MareNostrum, one of the most powerful supercomputers in Europe, was a founding and hosting member of the former European HPC infrastructure PRACE (Partnership for Advanced Computing in Europe), and is now hosting entity for EuroHPC JU, the Joint Undertaking that leads large-scale investments and HPC provision in Europe. The mission of BSC is to research, develop and manage information technologies in order to facilitate scientific progress. BSC combines HPC service provision and R&D; into both computer and computational science (life, earth and engineering sciences) under one roof, and currently has over 1300 staff from 60 countries.
The High-Performance Embedded Systems (HPES) laboratory aims at enabling the adoption of hardware, software, and artificial intelligent (AI) high-performance solutions in embedded systems as its center of gravity, but also in any system with some form of criticality, like cars, airplanes, and satellites. Our work is mainly carried out in the context of bilateral projects with several processor companies as well as several European-funded projects. For a complete list of publications of the group in the last years, please visit this link.
**Key Duties**
- Familiarize with representative computer architecture simulators
- Use the selected simulator to model specific processor designs on which time predictability and/or performance bottlenecks have been detected
- Proposal of new hardware techniques/solutions to cover those bottlenecks
- Lead the implementation and reporting of those solutions
- Benchmarking of real boards might be needed to provide evidence on the identified bottlenecks
**Requirements**:
- Education
- Bachelor’s degree in Computer Science with specialization in Processor Computer Architecture
- Essential Knowledge and Professional Experience
- Additional Knowledge and Professional Experience
- Familiarity with RISC-V is a plus
- Familiarity with CPU/MPSoC performance evaluation on real boards is a plus
- Generic programming and scripting languages (C, C++, Python, etc.).
- Competences
- Problem-solving, proactive, collaborative, and result-oriented work attitude Good communication skills**Conditions**
- The position will be located at BSC within the Computer Sciences Department
- We offer a full-time contract (37.5h/week), a good working environment, a highly stimulating environment with state-of-the-art infrastructure, versátil working hours, extensive training plan, restaurant tickets, private health insurance, support to the relocation procedures
- Duration: Open-ended contract due to technical and scientific activities linked to the project and budget duration
- Holidays: 23 paid vacation days plus 24th and 31st of December per our collective agreement
- Starting date: 16/10/2025
**Applications procedure and process**
- A full CV in English including contact details
- A cover/motivation letter with a statement of interest in English, clearly specifying for which specific area and topics the applicant wishes to be considered. Additionally, two references for further contacts must be included. Applications without this document will not be considered.
**Development of the recruitment process**
The selection will be carried out through a competitive examination system ("Concurso-Oposición"). The recruitment process consists of two phases:
- **Curriculum Analysis**: Evaluation of p