Job Title
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Senior Mixed-Signal IC Design Engineer
Location
Madrid, Spain (Tres Cantos) – with flexibility for remote working depending on profile
Company Overview
A cutting-edge semiconductor and technology company focused on the design and development of advanced mixed-signal and high-performance IC solutions.
The organisation operates at the forefront of innovation, developing complex integrated systems combining analog, digital, and optoelectronic technologies within deep submicron CMOS nodes. The team is highly collaborative, research-driven, and focused on delivering next-generation products for demanding applications.
Role Overview
The company is looking for a Senior Mixed-Signal IC Design Engineer to contribute to the specification, design, and validation of advanced analog and mixed-signal blocks within complex SoCs.
This role involves full ownership across the AMS design flow, working closely with system, layout, and test teams, while contributing to product innovation and future architecture development.
Key Responsibilities
* Define specifications for analog and mixed-signal blocks (ADC, DAC, PLLs, interfaces, optoelectronic modules)
* Design and verify AMS circuits in deep submicron CMOS (65nm / 28nm and below)
* Own full design flow: system-level modelling, schematic design, layout supervision, and post-layout verification
* Provide layout guidelines and review physical implementation
* Collaborate with test engineers on silicon validation, characterization, and correlation with simulations
* Support system-level modelling and integration into complex mixed-signal SoCs
* Contribute to mixed-signal verification alongside digital teams
* Research new architectures and contribute to IP / patent generation
* Present technical work and contribute to internal knowledge sharing
Requirements
* MSc or PhD in Electronics, Electrical Engineering, or related field
* ~5+ years’ experience in Analog / Mixed-Signal IC design
* Proven experience delivering designs into silicon (definition → validation → production)
* Strong experience with Cadence / Synopsys xcskxlj design tools
* Hands-on experience designing in sub-nanometer CMOS nodes (≤65nm)
* Solid understanding of full-custom analog layout and ability to review layout work
* Strong communication skills and ability to work in cross-functional teams
* Fluent in English
Nice to Have
* Experience with complex mixed-signal SoC integration
* Exposure to optoelectronics or interface design
* Experience with behavioural modelling
* Background contributing to innovative architectures or patent development
* Experience mentoring or guiding junior engineers
Salary & Package
Competitive and aligned with experience within an innovative semiconductor environment