PStaff DFT Design Engineer /ppBarcelona /p pThis is a fantastic opportunity for a DFT Engineer to join a European technology company headquartered in Barcelona! You will join them at a critical stage and be working at the forefront of designing next-generation accelerator chips. Specializing in high-performance computing and artificial intelligence. They have a firm focuses on developing energy-efficient processors using RISC-V architecture. /p pKey Responsibilities: /pulliWork on design execution of silicon design. /liliWork on SoC DFT architecture and DFM concept. /liliWork on the implementation and verification of DFT measures to meet product specifications and production requirements. /liliWork closely with cross-function teams (design, production test and qualification) to meet test requirements with effective DFT solutions. /liliContribute to target coverage requirements for logic, memories, IO and mixed-signal IPs. /liliGenerate test patterns and support post-silicon ATE and QnR. /li /ul pRequired Skills and Experience: /pulli10+ years of experience gained in IC digital design with multiple cycles of DFT and RTL design. /liliGood knowledge of MBIST Insertion, Compression Insertion, Scan Stitching, OCC insertion, iJTAG. /liliGood Knowledge of ATPG, Pattern Generation, Simulation. /liliUnderstanding of basic commands of EDA/Simulation tools, e.g. Tessent, VCS /liliHands on Experience in DFT Flow bring up using scripting languages like TCL/Perl/Makefile based. /liliHands on Experience in flow bring up for MBIST Insertion, EDT/OCC insertion, Scan Stitching, ATPG/Simulation Flow. /li /ul pEven better if you have Knowledge of NOC architecture, and/or RISC-V ISA/architecture and SOC based on this processor. /p pRelocation and visa support can be given, to be considered you must be prepared to work 3 days per week onsite in Barcelona. /p pFor more information, please contact Rachel Mason at IC Resources. /p