Job Title:
UVM / PCIe Verification Engineer (Contract)Contract Length:
6 MonthsLocation:
Barcelona, SpainWork Model:
Hybrid / Remote AvailableEligibility:
EU Candidates Only
Overview
We are looking for an experienced UVM / PCIe Verification Engineer to join a leading technology client based in Barcelona on a 6-month contract.
The successful candidate will work as part of a high-performing verification team responsible for ensuring the quality and functionality of complex high-speed digital interfaces, with a focus on PCIe verification using UVM methodology.
This role offers flexibility with hybrid or remote working options, while collaborating with an international engineering team.
Key ResponsibilitiesDevelop and maintain UVM-based verification environments for complex digital designsVerify PCIe-based IP and subsystems to ensure compliance with specifications and performance requirementsCreate and execute test plans, test cases, and verification strategiesPerform functional and protocol-level verification of high-speed interfacesDevelop SystemVerilog testbenches and verification componentsAnalyse simulation results and debug design and verification issuesWork closely with design, architecture, and integration teams to ensure verification coverage and product qualityContribute to coverage closure and regression testing
Required Skills & ExperienceStrong experience in SystemVerilog and UVM verification methodologyProven experience verifying PCIe (PCI Express) interfaces or IPExperience building UVM testbenches, sequences, scoreboards, and monitorsSolid understanding of digital design and verification principlesExperience with functional coverage and constrained random verificationStrong debugging and problem-solving skillsAbility to work effectively in distributed and international teams
Preferred / Nice to HaveExperience with high-speed interface verification (PCIe Gen4/Gen5 preferred)Knowledge of verification planning and coverage methodologiesExperience with EDA simulation tools (e.G., Synopsys, Cadence, Siemens/Mentor)Experience working on SoC or IP-level verification