Senior DFT Engineer - RISC-V Soc Project - Barcelona A RISC-V semiconductor company designing SoC for accelerated computing is looking for a Senior DFT Engineer to join them in Barcelona.
Key Skills:
A strong track record in DFT gained across several successful ASIC projects.
DFT experience including architecture specification, implementation, test pattern development and verification.
Knowledge about industrial standards and practices in DFT, including ATPG, JTAG, and MBIST.
An understanding or RTL design and verification is a plus.
Experience working on SoC or RISC V projects is beneficial.
For more information, please contact Lucy Edmondson at IC Resources